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A Scalable and Highly Configurable Cache-Aware Hybrid Flash Translation Layer

Sujet: solid state drives, cache, flash translation layer, hybrid-mapping, NAND flash memory, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR]
Auteur: Boukhobza, Jalil, Olivier, Pierre, Rubini, Stéphane
Résumé: This paper presents a cache-aware configurable hybrid flash translation layer (FTL), named CACH-FTL. It was designed based on the observation that most state-of-the-art flash-specific cache systems above FTLs flush groups of pages belonging to the same data block. CACH-FTL relies on this characteristic to optimize flash write operations placement, as large groups of pages are flushed to a block-mapped region, named BMR, whereas small groups are buffered into a page-mapped region, named PMR. Page group placement is based on a configurable threshold defining the limit under which it is more cost-effective to use page mapping (PMR) and wait for grouping more pages before flushing to the BMR. CACH-FTL is scalable in terms of mapping table size and flexible in terms of Input/Output (I/O) workload support. CACH-FTL performs very well, as the performance difference with the ideal page-mapped FTL is less than 15% in most cases and has a mean of 4% for the best CACH-FTL configurations, while using at least 78% less memory for table mapping storage on RAM.
Source: info:eu-repo/semantics/altIdentifier/doi/10.3390/computers3010036
Editeur: HAL CCSD